Idea Transcript
+ +
3
SLUS452 – NOVEMBER 2000
Dynamic Power Management, DPM
ACDET ACPRES ACSEL BATDEP SRSET ACSET VREF ENABLE BATSET COMP ACN ACP
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
ACDRV BATDRV VCC PWM VHSP ALARM VS GND SRP SRN IBAT BATP
description The bq24700 is a highly integrated battery charge controller and selector tailored for the notebook and sub-notebook PC applications. The bq24700 uses Dynamic Power Management (DPM) to minimize battery charge time by maximizing use of available wall-adapter power. This is achieved by dynamically adjusting the battery charge current based on the total system (adapter) current. The bq24700 uses a fixed frequency, voltage mode, pulse width modulator (PWM) controller to accurately control battery charge current and voltage. Charge current limits can be programmed from a keyboard controller DAC or by external resistor dividers from the precision 5-V, ±0.5%, voltage reference (VREF), supplied by the bq24700. The battery voltage limit can be programmed by using the internal 1.25-V, ±0.5% precision reference, making it suitable for the critical charging demands of lithium-ion cells. Also, the bq24700 provides an option to override the precision 1.25-V reference and drive the error amplifier either directly from an external reference or from a resistor divider off the 5 V supplied by the integrated circuit. The selector function allows the manual selection of the system power source, battery or wall-adapter power. The bq24700 supports battery-conditioning and battery-lean cycles through the ACSEL function. The ACSEL function allows manual selection of the battery or wall power as the main system power. It also provides autonomous switching to the remaining source (battery or ac power) should the selected system power source terminate (refer to Table 1). The bq24700 also provides an alarm function to indicate a depleted battery condition. The bq24700 PWM controller is ideally suited for operation in a buck converter for applications when the wall-adapter voltage is greater than the battery voltage. For applications where the adapter voltage can drop below the battery voltage, a single-ended primary inductance converter (SEPIC) can be used.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Benchmarq US Patent # 5,352,970 Copyright 2000, Texas Instruments Incorporated
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POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
PRODUCT PREVIEW
Minimizes Battery Charge Time Integrated Selector Supports Battery Conditioning and Smart Battery Learn Cycle Selector Feedback Circuit Insures Break-Before-Make Transition ±0.5% Charge Voltage Accuracy, Suitable for Charging Li-Ion Cells ±2% Charge Current Accuracy 300-kHz Integrated PWM Controller for High-Efficiency Buck Regulation Depleted Battery Detection and Indication to Protect Battery from Over Discharge 15-µA Sleep Mode Current for Low Battery Drain 24-Pin TSSOP Package
PW PACKAGE (TOP VIEW)
SLUS452 – NOVEMBER 2000 R5 0.025 1W
ADAPTER SUPPLY D1 MBRD640CT DPAK
Q2 IRFR9024N Q1 33 µH IRFR9024N
100 Ω
R1 499 kΩ
11
ACN
ACDRV
24
12
ACP
VCC
22
1
ACDET
PWM
21
8
ENABLE
SRP
16
3
ACSEL
SRN
15
19
ALARM
BATP
13
5
SRSET
BATDRV
23
6
ACSET
VS
18
Q3 IRFR9024N
TO SYSTEM D4 17 V
R6 0.025 0.5 W
bq24700
100 Ω
VBAT
R7 523 kΩ
1µF
12.6 V +
C5, C6 22 µF 35 V 593 D ECase
D4 17 V
R14 523 kΩ
100 kΩ R10 10 Ω
R9 57.6 kΩ
R15 57.6 kΩ
C3 10 µF
100 kΩ
PRODUCT PREVIEW
J1
20 kΩ
2
ACPRES
14
IBAT
7
VREF
5VREF C7 3.3 µF
C8
VHSP
20
BATSET
9
BATDEP
4
VCC
499 kΩ VBAT C4 10 µF 35 V
150 pF GND 10
C9 4.7 µF
D3 18 V
17
180 pF
100 kΩ
COMP
R13 100 Ω UDG–00138
CHARGE VOLTAGE SETPOINT
Figure 1. Typical Notebook Charge Management Application AVAILABLE OPTIONS SELECTOR FUNCTION TA
Depleted Battery: Maintain Battery Select Alarm Signal: Select Input and Output
Depleted Battery: Switch to AC Alarm Signal: Depleted Battery
–40°C to 85°C bq24700PW bq24701PW † All voltages are with respect to ground. Currents are positive into and negative out of the specified terminals. Consult the Packaging Section of the Databook for thermal limitations and considerations of the package.
absolute maximum ratings over operating free-air temperature (unless otherwise noted) Supply voltage range: VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 32 V Battery voltage range: SRP, SRN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 19 V Input voltage: ACN, ACP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC 0.7 V Virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C Storage temperature range Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead Temperature (Soldering, 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ All voltages are with respect to ground. Currents are positive into and negative out of the specified terminals. Consult the Packaging section of the databook for thermal limitations and considerations of the package.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLUS452 – NOVEMBER 2000
recommended operating conditions (TA = TOPR) all voltages relative to Vss MIN
MAX
UNIT
Analog and PWM operation
7.0
30
V
Selector operation
4.5
30
V
Negative ac Current Sense, (ACN)
7.0
30
V
Positive ac Current Sense, (ACP)
7.0
30.2
V
Negative Battery Current Sense, (SRN)
5.0
18
V
Positive Battery Current Sense, (SRP)
5.0
18.2
V
Operating free–air temperature, TA
–40
85
°C
MAX
UNIT
quiescent current (TA=TOPR, 7.0 Vdc
VCC
30.0 Vdc, all voltages relative to Vss)
PARAMETER
TEST CONDITIONS
IDDOP Total Chip Operating Current ISLEEP Total Sleep Current
1
ACPRES = Low
logic interface dc characteristics (TA=TOPR 7.0 Vdc PARAMETER VOL VIL
MIN
ACPRES = High
VCC
MIN
TYP
IOL = 1 mA
Low–level input voltage (ACSEL, ENABLE)
VIH High–level input voltage (ACSEL, ENABLE) ISINK1 Sink current (ACPRES)
mA
30
µA
30.0 Vdc, all voltages relative to VSS )
TEST CONDITIONS
Low–Level output voltage (ACPRES, ALARM)
6
MAX
UNIT
0.4
V
0.8
V
1.8
V
2
5
8
mA
0.75
1.5
3.5
mA
MIN
TYP
MAX
UNIT
Oscillator frequency
260
300
340
kHz
Maximum duty cycle
100%
ISINK2 Sink current (ALARM)
VOL = 0.4 VOL = 0.4
PRODUCT PREVIEW
Supply voltage voltage, (VCC)
pwm oscillator PARAMETER fOSC(PWM)
TEST CONDITIONS
Input voltage for maximum dc (COMP)
3.8
V
Minimum duty cycle
0%
Input voltage for minimum dc (COMP)
0.8
V
2.00
2.15
V
3.8
4.2
V
110
140
µA
VRAMP
Oscillator ramp voltage
VIK(COMP)
Internal input clamp voltage (tracks COMP voltage for maximum dc)
1.85
IS(COMP)
Internal source current (COMP)
Error amplifier = OFF, VCOMP = 1 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
70
3
SLUS452 – NOVEMBER 2000
battery current-sense amplifier PARAMETER gm BW
Transconductance gain
CMRR
Common-mode rejection ratio
VICR
Common-mode input voltage range (SRP)
VCC = SRN + 2 V
ISINK
Sink current (COMP)
COMP = 1 V,
(SRP – SRN) = 10 mV
Input bias current (SRP)
VSRP = 16 V,
SRSET = 0 V,
VCC = 20
IIB
Input bias current (SRN)
VSRP = 16 V,
SRSET = 0 V,
VCC = 20
VIC
Common mode input voltage (SRSET)
G
Battery current set gain
0.5 V < SRSET < 2.5 V, –40°C < TA < 85°C,
Mid-range battery current accuracy
SRSET = 1.25 V, SRN = 16 V,
–3 db bandwidth
Total battery current accuracy
PRODUCT PREVIEW
TEST CONDITIONS
NOTE 1: I
BAT
x µF capacitor from COMP to VSS
MIN
TYP
MAX
UNIT
90
150
210
mA/V
1
MHz 90
5 0.5
18.2
V
1.5
2.5
mA
6
10
µA
200
300
µA
2.5
V
0 8 V < SRN < 16 V, See Note 1
VCC = 20 V, RSENSE = 50mΩ, TA = 25°C 0.5 V < SRSET < 2.5 V, 8 V < SRN < 16 V, –40°C < TA < 85°C
dB
24
25
26
0.98
1.00
1.02
–5%
A
5%
SRSET 1 R A V SENSE
adapter current-sense amplifier PARAMETER gm CMRR
TEST CONDITIONS
Transconductance gain
MAX
UNIT
150
210
mA/V
90
VICR ISINK
Sink current (COMP)
COMP = 1 V,
Input bias current (ACP, ACN)
ACP = ACN = 25 V, VCC = 25 V,
SRSET = 0 V, ACSET = 1.25 V
Input bias current accuracy ratio (ACP, ACN)
ACP = ACN = 25 V, ACSET = 1.25 V
VCC = 25 V,
IIB
7.0 (ACP – ACN) = 10 mV
VIC
Common mode input voltage (ACSET)
G
AC current set gain
0.5 V < ACSET < 2.5 V, –40°C < TA < 85°C,
Mid-range ac current accuracy
ACSET = 1.25 V, ACP = 25V,
Total ac current accuracy
4
TYP
90
Common-mode rejection ratio Common-mode input voltage range
NOTE 2: I
MIN
AC
VCC+0.2
VCC = 25 V, RSENSE = 50 mΩ, TA = 25°C ACP = ACN = 25 V, VCC = 25 V, 0.5 V < ACSET < 2.5 V, –40°C < TA < 85°C
ACSET 1 R A V SENSE
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
V
0.5
1.5
2.5
mA
15
25
35
µA
0.98
1.00
1.02
0 12 V < ACP < 25 V, See Note 2
dB
2.5
24.5
25.5
26.5
0.96
1.00
1.04
–5%
5%
V
A
SLUS452 – NOVEMBER 2000
battery voltage error amplifier PARAMETER gm GBW
Transconductance gain
CMRR
Common-mode rejection ratio
VICR
Common-mode input voltage range
VIT
Internal reference override input threshold voltage
ISINK
Sink current COMP
VREF
Internal error amplifier am lifier reference voltage
Gain bandwidth product
TEST CONDITIONS x µF capacitor from COMP to VSS
MIN
TYP
MAX
UNIT
75
135
195
mA/V
1
MHz 90
1 < BATSET < 2.5
1
dB 2.5
V
0.20
0.25
0.30
V
0.5
1.5
2.5
mA
0°C < TA < 70°C
1.240
1.246
1.252
V
–40°C < TA < 85°C
1.235
1.246
1.252
V
COMP = 1V BATSET = 1.25 V
(BATP – BATSET) = 10mV,
MIN
TYP
MAX
UNIT
GTR
Transfer gain
PARAMETER
(SRP – SRN) = 50 mV,
See Note 3
19.0
20.4
21.8
V/V
VIBAT
Battery current readback output voltage (IBAT)
(SRP – SRN) = 50 mV, VCC = 18 V,
SRP = 12 V, TA = 25°C
0.97
1.03
V
Line rejection voltage
TA = 25°C 20 mV < (SRP – SRN) < 100 mV 0°C < TA < 70°C
Total battery current readback accuracy
TEST CONDITIONS
–40°C < TA < 85°C
10
mV/V
–5%
5%
–7%
7%
CM
Common-mode input range (SRP)
5
18.2
V
VO(IBAT)
Battery current output voltage range (IBAT)
0
2.5
V
IS(O)
Output source current (IBAT)
NOTE 3: G
TR
(SRP – SRN) = 100 mV
250
PRODUCT PREVIEW
battery current output amplifier
µA
400
V IBAT (SRP SRN)
voltage reference and half supply regulator PARAMETER VO
Output voltage (VREF)
MIN
TYP
MAX
UNIT
0°C < TA < 70°C
TEST CONDITIONS
5.000
5.030
5.060
V
–40°C < TA < 85°C
4.960
5.030
5.060
Line regulation Load regulation Short circuit current VHSP(on)
VCC up-threshold for half supply regulation VCC hysteresis for half supply regulation
VHSP/VCC VHSP
Voltage regulation
VCC ≥ VHSP(on),
16 V < VCC < 30 V
VCC < VHSP(on), 7 V < VCC < 14 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
V
0.1
mV/V
4.0
mV/mA
8
18
30
mA
14
15
16
V
–7.0%
-6.5%
–6.0%
0.45
0.50
0.55 2.0
V
5
SLUS452 – NOVEMBER 2000
MOSFET gate drive PARAMETER
TEST CONDITIONS
AC driver RDS(on) high AC driver RDS(on) low Battery driver RDS(on) high Battery driver RDS(on) low tDa tDb
TYP
MAX
UNIT
VCC = 18 V VCC = 18 V
MIN
150
250
Ω
60
120
Ω
VCC = 18 V VCC = 18 V
200
370
Ω
100
170
Ω
0.5
1.5
µs
1.0
2.5
µs
Time delay from ac driver off to battery driver on Time delay from battery driver off to ac driver on
VOH
IOUT = –10 mA, IOUT = –100 mA,
PWM driver high-level high level output voltage
VCC = 18 V
–0.12
–0.07
VCC = 18 V
–1.2
–0.7
IOUT = 10 mA, IOUT = 100 mA,
PWM driver low low-level level output voltage
VCC = 18 V VCC = 18 V
V
7
14
Ω
VHSP+0.04 VHSP+0.5
VHSP+0.1 VHSP+0.9
V
4
8
Ω
PWM driver RDS(on) high VOL
V
PWM driver RDS(on) low
V
selector
PRODUCT PREVIEW
PARAMETER
TEST CONDITIONS
MIN 1.17
TYP
MAX
VACPRES VIT(ACPRES)
AC presence detect voltage
td(ALMON) td(ALMOFF)
ACSEL high to alarm set high in ac fault time delay
ACSEL = 0 V to 2 V
5
10
µs
ACSEL low to alarm reset low in ac fault time delay
SRN = SRP = 8 V
2
10
µs
VBATDEP VNOBAT
Battery depletion ALARM trip voltage
1.17
1.22
1.25
V
No battery detect, switch to ACDRV
0.94
0.98
1.00
V
Vt(BATSEL) Vt(ACSEL)
Battery select time (ACSEL low to BATDRV low)
3.0
µs µs
VVS VIT(VS)
AC presence hysteresis
1.22
1.25
UNIT
80
V mV
VS < BATP
0.2 0.2
3.0
VS voltage to enable BATDRV
BATP = 1 V
0.96
1.02
V
VS voltage hysteresis
VS > BATP
30
110
mV
AC select time (ACSEL high to ACDRV low)
pin assignments ACDET: AC or adapter power detection. This input pin is used to determine the presence of the ac adapter. When the voltage level on the ACDET pin is less than 1.20 V, the bq24700 is in sleep mode, the PWM control is disabled, the BATDRV is driven low and the ACDRV is driven high. This feature can be used to automatically select battery as the system’s power source. ACDRV: AC or adapter power source select output. This pin drives an external P-channel MOSFET used to switch to the ac wall-adapter as the system’s power source. When the ACSEL pin is high while the voltage on the ACDET pin is greater than 1.20 V, the output ACDRV pin is driven low (VHSP). This pin is driven high (VCC) when the ACDET is less than 1.20 V. ACN, ACP: Negative and positive differential inputs, respectively for ac-to-dc adapter current sense resistor. ACPRES: This open-drain output pin is used to indicate the presence of ac power. A logic high indicates there is a valid ac input. A low indicates the loss of ac power. ACPRES is high when the voltage level on the ACDET pin is greater than 1.20 V. ACSEL: AC adapter power select. This input selects either the ac adapter or the battery as the power source. A logic high selects ac power, while a logic low selects the battery. ACSET: Adapter current input threshold. This input sets the system current level at which dynamic power management occurs. Adapter currents above this threshold activate the dynamic power management and proportionally reduce the available power to the battery.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLUS452 – NOVEMBER 2000
ALARM: Depleted battery alarm output. This open-drain pin indicates that a depleted battery condition exists. A pull-up on ALARM goes high when the voltage on the BATDEP pin is below 1.20 V. On the bq24700, the ALARM output also activates when the selector inputs do not match the selector state. BATDEP: Depleted battery level. A voltage divider network from the battery to BATDEP pin is used to set the battery voltage level at which depletion is indicated by the ALARM pin. See ALARM pin for more details. A battery depletion is detected when BATDEP is less than 1.2 V. A no battery condition is detected when the battery voltage is < 80% of the depleted threshold. In a no battery condition, the bq24700 automatically selects ac as the input source. If ENABLE = 1, the PWM remains enabled. BATDRV: Battery power source select output. This pin drives an external P-channel MOSFET used to switch the battery as the system’s power source. When the voltage level on the ACDET pin is less than 1.2 V, the output of the BATDRV pin is driven low, GND. This pin is driven high (VCC) when ACSEL is high and ACDET > 1.2 V. BATP: Battery float voltage measurement input to the battery-voltage gm amplifier. The voltage on this pin is typically derived from a voltage divider network connected across the battery. In a voltage loop, BATP is regulated to the 1.25 V, ±0.5% precision reference of the battery voltage gm amplifier. BATSET: An external override to an internal precision 0.5% reference. When BATSET is > 0.25 V, the voltage level on the BATSET pin sets the voltage charge level. When BATSET ≤ 0.25 V, an internal 1.25-V, ±0.5% reference is connected to the inverting input of the battery error amplifier. To ensure proper battery voltage regulation with BATSET, BATSET must be > 1.0 V. COMP: The inverting input to the PWM comparator and output of the gm amplifiers. A type II compensation network between COMP and GND is recommended. ENABLE: Charge enable. A high on this input pin allows PWM control operation to enable charging while a low on this pin disables and forces the PWM output to a high state. GND: Supply return and ground reference IBAT: Battery current differential amplifier output. The output of this pin produces a voltage proportional to the battery charge current. This voltage is suitable for driving an ADC input. PWM: Gate drive output pin drives the P-channel MOSFET for PWM control. The PWM control is active when ACPRES, ACSEL, and ENABLE are high. PWM is driven low to VHSP and high to VCC. SRN, SRP: Differential amplifier inputs for battery current sense. These pins feed back the battery charge current for PWM control. SRSET: Battery charge current input threshold. The level on this pin sets the battery charge current limit. VCC: Operational supply voltage. VHSP: The VHSP pin is connected to a 10-µF capacitor (close to the pin) to provide a stable voltage source to drive the gates of the external MOSFETs. VHSP is equal to (0.5 × VCC) for VCC ≥ 15 V and 0 V for VCC < 15 V (refer to Figure 12). An 18-V Zener diode should be placed between VCC and VHSP for VCC > 20 V to prevent MOSFET overstress during startup. VREF: Precision voltage 5-V, ±0.5% output. It can be used to set fixed levels on the inverting inputs of any one of the three error amplifiers if desired. The tight tolerance is suitable for charging lithium-ion batteries. A 3.3-µF (or higher) capacitor should be placed close to the pin. VS: System (Load) voltage input pin. The voltage on this pin indicates the system voltage in order to insure a break before make transition when changing from ac power to battery power. The battery is protected from an over-voltage condition by disabling the P-channel MOSFET connected to the BATDRV pin if the voltage at VS is greater than BATP. This function can be eliminated by grounding the VS pin.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
PRODUCT PREVIEW
SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION VHSP
VCC
20
22
VREF 7 VREF = 5 V 0.5%
ACPRES
VCC/2
2
VCC > 15 V
REF1 = 1.22 V
ACPRES
1
REF2 = 1.25 V 0.5%
ACPRES
HYST = 6% ACDET
VOLTAGE REFERENCE
+
VCC
300 kHz
S
Q
R
Q
2V REF1 = 1.22 V
ACSEL
3
ENABLE
8
OSC
PWM LOGIC
HIGH–SIDE DRIVE
LEVEL SHIFT
21
PWM
13
BATP
9
BATSET
16
SRP
15
SRN
5
SRSET
24
ACDRV
23
BATDRV
17
GND
14
IBAT
+ VHSP
5V
PRODUCT PREVIEW
100 µA
COMP
BATTERY VOLTAGE ERROR AMPLIFIER
10
VCC
2 kΩ ACP
12
+
ACN
11
ACSET
9
ac CURRENT ERROR AMPLIFIER
+
SRN
4
DEPLETED BATTERY COMPARATOR BATP
VS
18
ALARM
19
2 kΩ
+ + VCC
+
50 kΩ ADAPTER SELECT DRIVE
NO BATTERY COMPARATOR
+
VHSP
2
+ SWITCH TO BATTERY
0.25 V
1.25 V 0.5%
BATTERY CURRENT ERROR AMPLIFIER 0.8 x REF1
REF1=1.22 V
+
+
25 kΩ
BATDEP
5V
ACPRES ACSEL 1
1 bq24700 ONLY
VCC
BATTERY SELECT LOGIC AND ANTI–CROSS CONDUCT ACDRV
ACSEL
BATTERY SELECT DRIVE
SRN VREF SRP SRN
+
A=20
2 bq24701 ONLY UDG–00137
Figure 2. bq24700 Block Diagram
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION dynamic power management The Dynamic Power Management (DPM) feature allows a cost effective choice of an ac wall-adapter that accommodates 90% of the system’s operating-current requirements. It minimizes battery charge time by allocating available power to charge the battery (i.e. IBAT = IADPT – ISYS). If the system plus battery charge current exceeds the adapter current limit, as shown in Figure 3, the DPM feature reduces the battery charge current to maintain an overall input current consumption within user defined power capability of the wall-adapter. As the system’s current requirements decrease, additional current can be directed to the battery, thereby increasing battery charge current and minimizing battery charge time. The DPM feature is inherently designed into the PWM controller by inclusion of the three control loops, battery-float voltage, battery-charge current, and adapter-charge current, refer to Figure 2. If any of the three user programmed limits are reached, the corresponding control loop commands the PWM controller to reduce duty cycle thereby reducing the battery charge current.
PRODUCT PREVIEW
ADAPTER CURRENT LIMIT
ADAPTER CURRENT
SYSTEM CURRENT
BATTERY CHARGE CURRENT
NO CHARGE
MAXIMUM CHARGE CURRENT
DYNAMIC POWER MANAGEMENT Time
MAXIMUM CHARGE CURRENT UDG–00113
Figure 3. Dynamic Power Management
battery charger operation The bq24700 fixed-frequency, PWM controller is designed to provide closed-loop control of battery charge-current (ICH) based on three parameters, battery-float voltage (VBAT), battery-charge current, and adapter charge current (IADPT). The bq24700 is designed primarily for control of a buck converter usinga high side P-channel MOSFET device (SW, refer to Figure 4). The three control parameters are voltage programmable through resistor dividers from the bq24700 precision 5-V reference, an external reference, or directly via a DAC interface from a keyboard controller. Adapter and battery-charge current information is sensed and fed back to two transconductance (gm ) amplifiers via low-value-sense resistors in series with the adapter and battery respectively. Battery voltage information is sensed through an external resistor divider and fed back from the battery to a third gm amplifier.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION
SW
ISW
+ VADPT
VBAT
CLK OSC RAMP
ENABLE S
Q
R
Q
LATCH OUT
VCC LEVEL SHIFT
5V 100 µA
PWM COMPARATOR
PWM DRIVE
21 PWM
VHSP
FROM ENABLE LOGIC COMP 10
PRODUCT PREVIEW
+
14 IBAT
ZCOMP
ENABLE
BATTERY VOLTAGE
+
1.25 V
BATTERY CHARGE CURRENT ADP CURRENT gm AMPLIFIERS UDG–00114
Figure 4. PWM Controller Block Diagram PWM operation The three open collector gm amplifiers are tied to the COMP pin (refer to Figure 4), which is internally biased up by a 100-µA constant current source. The voltage on the COMP pin is the control voltage (VC) for the PWM comparator. The PWM comparator compares VC to the sawtooth ramp of the internally fixed 300-kHz oscillator to provide duty cycle information for the PWM drive. The PWM drive is level shifted to provide adequate gate voltage levels for the external P-channel MOSFET. Refer to PWM selector switch gate drive section for gate drive voltage levels. softstart Softstart is provided to ensure an orderly startup when the PWM is enabled. When the PWM controller is disabled (ENABLE = Low) the 100-µA current source pullup is disabled and the COMP pin is actively pulled down to GND. Disabling the 100-µA pullup reduces current drain when the PWM is disabled. When the bq24700 PWM is enabled (ENABLE = High) the COMP pin is released and the 100-µA pull-up is enabled (refer to Figure 4). The voltage on the COMP pin increases as the pullup charges the external compensation network connected to the COMP pin. As the voltage on the COMP pin increases the PWM duty cycle increases linearly as show in Figure 5.
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APPLICATION INFORMATION PERCENT DUTY CYCLE vs COMPENSATION VOLTAGE 100 90
Percent Duty Cycle – %
80 70 60 50 40 30
10 0 1.2
1.7
2.2
2.7
3.2
VCOMP – Compensation Voltage – V
Figure 5
As any one of the three controlling loops approaches the programmed limit, the gm amplifier begins to shunt current away from the COMP pin. The rate of voltage rise on the COMP pin slows due to the decrease in total current out of the pin, decreasing the rate of duty cycle increase. When the loop has reached the programmed limit the gm amplifier shunts the entire bias current (100 µA) and the duty cycle remains fixed. If any of the control parameters tries to exceed the programmed limit the gm amplifier shunts additional current from the COMP pin, further reducing the PWM duty cycle until the offending parameter is brought into check.
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PRODUCT PREVIEW
20
SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION I
CH
(avg)
I
CH
PWM
V
S
PRODUCT PREVIEW
V
C
CLK UDG–00115
Figure 6. Typical PWM Waveforms in a Buck Converter (including Startup)
setting the battery float voltage The battery float voltage is programmed through the BATSET pin. The BATSET input is a high-impedance input that is driven by either a keyboard controller DAC or via a resistor divider from a precision reference (see Figure 7). The battery voltage is fed back to the gm amplifier through a resistor divider network. The battery float voltage can be defined as: V
BATTERY
(R1 R2) V R2
BATSET V
(1)
The overall accuracy of the battery float voltage is a function of the reference voltage tolerance as well as the tolerances on R1 and R2. The precision voltage reference has a 0.5% tolerance making it suitable for the tight battery voltage requirements of Li-ion batteries. Tolerance resistors of 0.1% are recommended for R1 and R2 as well as any resistors used to set BATSET. The bq2470x provides the capability of using an internal precision voltage reference (1.25 Vdc) through the use of a multiplexing scheme, refer to Figure 7, on the BATSET pin. When BATSET voltage is less than 0.25 V, an internal 1.25-V, 0.5% reference is switched in and the BATSET pin is switched out from the gm amplifier input. When the BATSET voltage is greater than 0.25 V, the BATSET pin voltage is switched in to the input of the gm amplifier and the 1.25 V voltage reference is switched out. NOTE:The minumum recommended BATSET is 1.0 V, if BATSET is used to set the voltage loop.
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APPLICATION INFORMATION V BAT
BATP
COMP 13
gm AMPLIFIER
9
+ BATSET
1.25 V 10
1.25 V
0.25 V V BAT
PRODUCT PREVIEW
(a) VBATSET < 0.25 V
R1 VREF = 5 V
COMP
BATP 13
gm AMPLIFIER
9
+
R2 1.25 V 10 BATSET
0.25 V
1.25 V
(b) VBATSET > 0.25 V
UDG–00116
Figure 7. Battery Error Amplifier Input Multiplexing Scheme
programming the battery charge current The battery charge current is programmed via a voltage on the SRSET pin. This voltage can be derived from a resistor divider from the 5-V VREF or by means of an DAC. The voltage is converted to a current source that is used to develop a voltage drop across an internal offset resistor at one input of the SR gm amplifier. The charge current is then a function of this voltage drop and the sense resistor (RSR), refer to Figure 8.
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SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION RS
COMP 10
SRP
2 kΩ 16
+
VREF
SRN 15 SRSET 5
+ 50 kΩ
UDG–00117
PRODUCT PREVIEW
Figure 8. Battery Charge Current Input Threshold Function
The battery charge current can be defined as: I
V SRSET BAT 25 R S
(2)
where VSRSET is the programming voltage on the SRSET pin. VSRSET maximum is 2.5 V.
programming the adapter current Like the battery charge current described previously, the adapter current is programmed via a voltage on the ACSET pin. That voltage can either be from an external resistor divider or from an external DAC. The adapter current is defined as: I
ADPT
V
ACSET 25 R S2
(3)
component selection MOSFET selection MOSFET selection depends on several factors, namely, gate-source voltage, input voltage and input current. The MOSFET must be a P-channel device capable of handling at least 20-V gate-to-source with a drain-source breakdown of VBV~ VIN+1V. The average input current can be approximated by: I
14
(avg) IN
VO IO 1.2 V
A (4)
IN
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SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION The RMS current through the MOSFET is defined as: I
(RMS) I (avg) IN IN
D1
A
RMS
(5)
Schottky rectifier (freewheeling) The freewheeling Schottky rectifier must also be selected to withstand the input voltage, VIN. The current waveform for the freewheeling diode is also shown in Figure 8 (ID1). The average current can be approximated from: I
(avg) I (1 D) A D1 O
(6)
The inductance value determines the current slope (or ramp) on top of the current step in Figure 8. Lower inductance values result in a steeper slope. Steeper current slopes result in the converter operating in the discontinuous mode at a higher power level. Steeper current slopes also result in higher output ripple current, which may require a higher number, or more expensive capacitors to filter the higher ripple current. In addition, the higher ripple current results in an error in the sensed battery current particularly at lower charging currents. It is recommended that the ripple current not exceed 20% to 30% of full scale dc current. L
VIN VBAT VBAT fs 0.2 I
FS
V
IN
(7)
Too large an inductor value results in the current waveform of Q1 and D1 in Figure 8 approximating a squarewave with an almost flat current slope on the step. In this case, the inductor is usually much larger than necessary, which may result in an efficiency loss (higher DCR) as well as an area penalty.
selecting an output capacitor For this application the output capacitor is used primarily to shunt the output ripple current away from the battery. The output capacitor should be sized to handle the full output ripple current as defined as: I c (RMS)
VIN VBAT D fs L 12
(8)
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PRODUCT PREVIEW
choosing an inductance
SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION compensating the loop For the bq24700 used as a buck converter, the best method of compensation is to use a Type II compensation network from the output of the transconductance amplifiers (COMP pin) to ground (GND) as shown in Figure 9. A Type II compensation adds a pole-zero pair as well as an addition pole at dc. 100 µA
COMP +
10
gm AMPLIFIER
RCOMP CP
PRODUCT PREVIEW
CZ +
gm AMPLIFIER
+
gm AMPLIFIER
bq24700
UDG–00118
Figure 9. Type II Compensation Network The Type II compensation network places a zero at F 1R C Hz Z Z COMP 2
(9)
and a pole at F 1R C Hz P P COMP 2
(10)
For this battery charger application the following component values: CZ = 4.7 µF, CP = 150 pF, and RCOMP = 100Ω, provides a closed loop response with more than sufficient phase margin.
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APPLICATION INFORMATION selector operation The bq24700 allows the host controller to manually select the battery as the system’s main power source, without having to remove adapter power. This allows battery conditioning through smart battery learn cycles. In addition, the bq24700 supports autonomous supply selection during fault conditions on either supply. The selector function uses low RDS(on) P-channel MOSFETs for reduced voltage drops and longer battery run times. Note: Selection of battery power whether manual or automatic results in the suspension of battery charging. ADAPTER SELECT SWITCH ADAPTER INPUT SYSTEM LOAD
ACDRV (bq24700) 24 BATTERY SELECTOR BATDRV CONTROL 23
BAT
BATTERY SELECT SWITCH
UDG–00119
Figure 10. Selector Control Switches autonomous selection operation Adapter voltage information is sensed at the ACDET pin via a resistor divider from the adapter input (prior to the blocking Schottky rectifier). The voltage on the ACDET pin is compared to an internally fixed threshold. An ACDET voltage less than the set threshold is considered as a loss of adapter power regardless of the actual voltage at the adapter input. Information concerning the status of adapter power is fed back to the host controller through ACPRES. The presence of adapter power is indicated by ACPRES being set high. A loss of adapter power is indicated by ACPRES going low regardless of which power source is powering the system. During a loss of adapter power, the bq24700 obtains operating power from the battery through the body diode of the P-channel battery select MOSFET. Under a loss of adapter power, ACPRES (normally high) goes low, if adapter power is selected to power the system, the bq24700 automatically switches over to battery power by commanding ACDRV high and BATDRV low and ALARM goes high. During the switch transition period, battery power is supplied to the load via the body diode of the battery select p-channel MOSFET. When adapter power is restored, the bq24700 configures the selector switches according to the state of signals; ACSEL, and ACPRES. If the ACSEL pin is left high when ac power is restored, the bq24700 automatically switches back to ac power and the ALARM pin goes low. To remain on battery power after ac power is restored, the ACSEL pin must be brought low. Conversely, if the battery is removed while the system is running on battery power and adapter power is present, the bq24700 automatically switches over to adapter power by commanding BATDRV high and ACDRV low. Note: For the bq24700 any fault condition that results in the selector MOSFET switches not matching their programmed states is indicated by the ALARM pin going high. Please refer to Battery Depletion Detection section for more information on the ALARM discrete.
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PRODUCT PREVIEW
(bq24700) PWM BATTERY CHARGER
SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION smart learn cycles when adapter power is present Smart learn cycles can be conducted when adapter power is present by asserting and maintaining the ACSEL pin low. The adapter power can be reselected at the end of the learn cycle by a setting ACSEL to a logic high, provided that adapter power is present. Battery charging is suspended while selected as the system power source.
PRODUCT PREVIEW
When selecting the battery as the system primary power source, the adapter power select MOSFET turns off, in a break-before-make fashion, before the battery select MOSFET turns on. To ensure that this happens under all load conditions the system voltage (load voltage) can be monitored through a resistor divider on the VS pin. This function provides protection against switching over to battery power if the adapter selector switch were shorted and adapter power present. This function can be eliminated by grounding the VS pin. During the transition period from battery to adapter or adapter to battery, power is supplied to the system through the body diode of the battery select switch.
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APPLICATION INFORMATION battery depletion detection The bq24700 provides the host controller with a battery depletion discrete, the ALARM pin, to alert the host when a depleted battery condition occurs. The battery depletion level is set by the voltage applied to the BATDEP pin through a voltage divider network. The ALARM output asserts high and remains high as long as the battery deplete condition exists regardless of the power source selected. For the bq24700, the host controller must take appropriate action during a battery deplete condition to select the proper power source. The bq24700 remains on the selected power source. The bq24700, however, automatically reverts over to adapter power, provided the adapter is present, during a deep discharge state. The battery is considered as being in a deep discharge state when the battery voltage is less than (0.8 × depleted level). The bq24701 automatically switches back to adapter power if a battery deplete condition exists, provided that the adapter is present. Feature sets for the bq24700 and bq24701 are detailed in Table 1. Table 1. Feature Sets of the bq24700 and bq24701
bq24700
PRODUCT PREVIEW
Selector Operation
Condition
bq24701
Battery as Power Source Battery removal
Automatically selects ac
Automatically selects ac
Battery re-inserted
Selection based on selector inputs
Selection based on selector inputs
ac removal
Automatically selects battery
Automatically selects battery
ac re-inserted
Selection based on selector inputs
Selection based on selector inputs
Battery as power source
Sends ALARM signal
Automatically selects ac Sends ALARM signal
ac as power source
Sends ALARM signal
Sends ALARM signal
Depleted battery condition
Depleted battery condition
ac as Power Source
Depleted Battery Condition
ALARM Signal Active Selector inputs do not match selector outputs
selector/ALARM timing example The selector and ALARM timing example in Figure 11 illustrates the battery conditioning support. NOTE:For manual selection of wall power as the main power source, both the ACPRES and ACSEL signals must be a logic high.
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SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION ACPRES
ACSEL
ACDRV BATDRV
ALARM BATTERY DEPLETE CONDITION
PRODUCT PREVIEW
bq24701 ONLY
UDG–00122
ACSEL (ACPRES)
t BATSEL
ACDRV t ACSEL BATDRV
BATDEP < 1 V (NO BATTERY)
t ACSEL
BATDRV t BATSEL
ACDRV
UDG–00120
Figure 11. Battery Selector and ALARM Timing Diagram
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APPLICATION INFORMATION PWM selector switch gate drive Because the external P-channel MOSFETs (as well as the internal MOSFETs) have a maximum gate-source voltage limitation of 20 V, the input voltage, VCC, cannot be used directly to drive the MOSFET gate under all input conditions. To provide safe MOSFET-gate-drive at input voltages of less than 20 V, an intermediate gate drive voltage rail was established (VSHP). As shown in Figure 12, VSHP has a stepped profile. For VCC voltages of less than 15 V, VSHP = 0 and the full VCC voltage is used to drive the MOSFET gate. At input voltages of greater than 15 V, VSHP steps to approximately one–half the VCC voltage. This ensures adequate enhancement voltage across all operating conditions. The gate drive voltage, Vgs, vs VCC for the PWM and ac selector P-channel MOSFET’s are shown in Figure 12. MOSFET GATE DRIVE VOLTAGE vs INPUT VOLTAGE
PRODUCT PREVIEW
Vgs – Gate Drive – V
15
10
7.5
PWM ACDRV
4
ACDRV and PWM
0 0
4
7.5 10 15 20 VCC – Input Voltage – V
25
30
Figure 12
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SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION alternate converter topologies the SEPIC converter The buck converter topology shown in Figure 1 is useful for battery voltages less than the adapter voltage. If the adapter voltage drops below the battery voltage, however, battery charging is terminated and the battery supplies power to the load through the battery select P-channel MOSFET body diode. Therefore, battery charging can only be accomplished over a narrow adapter voltage range. The SEPIC, (single-ended primary converter) topology, shown in Figure 12, allows continuous battery charging whether the battery voltage is below, above, or equal to the adapter voltage thereby increasing the useful adapter voltage range for battery charging. The high-side P-channel switching MOSFET found in the buck converter is replaced with a low-side N-channel MOSFET. Back-to-back (source-to-source) P-channel MOSFETs are used for the battery select switch to prevent battery discharge through the body diode during low adapter voltage operation. The SEPIC converter however, has higher output ripple current. Therefore more expensive or more load capacitors may be required to shunt output ripple current from the battery during charging.
PRODUCT PREVIEW
Note: the back-to-back battery select MOSFETs prevent the battery from supplying the load through the body diode during the switch transition period.
ADAPTER SUPPLY TO SYSTEM L1
11 ACN
ACDRV 24
12 ACP
VCC 22
1
ENABLE AC SELECT DEPLETED BATTERY ALARM CHARGE CURRENT CONTROL
ENABLE
SRP 16
3
ACSEL
SRN 15
19 ALARM
BATP 13
5
BATTERY CURRENT
2
+
B A T
SRSET BATDRV 23 ACSET ACPRES
14 IBAT 7
L2
PWM 21
8
ADAPTER CURRENT SET POINT 6 AC PRESENT
ACDET
VREF
10 COMP
VS 18 VHSP 20 BATSET 9 BATDEP 4 GND 17 UDG–00121
Figure 13. Typical SEPIC Converter Application
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APPLICATION INFORMATION SEPIC component selection MOSFET and output diode selection In a SEPIC topology, both the switching MOSFET and switching diode need to withstand the input voltage plus output voltage. Therefore, components with a breakdown voltage VBV ≥ VIN + VOUT should be selected. In addition, the diode should be a Schottky type to minimize rectifier losses. The average current through the diode is the same as the load current. The peak current is approximately equal to the average input plus average output current. inductor selection
output capacitor selection To maximize charge voltage on the battery, the output ripple current must be kept to a minimum. Excessive ripple currents (peak) in the battery causes termination of charging due to early voltage indication. The actual charge voltage is a function of the ratio of peak to average ripple current and the ESR of the battery. The output capacitor is used primarily to shunt the ripple current away from the battery to reduce the peak/average ripple current ratio. As such the output capacitor should be sized to handle the output ripple current as defined by: I
RMS
I
CH A 1 D RMS
(11)
where ICH is the battery charge current. And D is the switching duty cycle as defined by: D
V
V
BAT V BAT CC
(12)
where VBAT is the battery voltage and VCC is the input voltage.
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PRODUCT PREVIEW
L1 and L2 can be either two individual inductors or two coupled windings on a single core. Both inductors have the same inductance value. The inductance value determines the ripple current through the two inductors. High ripple current through the inductors affects the maximum battery charge current as well as the adapter current sense. The larger the ripple current/average current ratio the larger the error in charging current and input current sense.
SLUS452 – NOVEMBER 2000
APPLICATION INFORMATION coupling capacitor selection The coupling capacitor allows the SEPIC to operate with input voltages greater or less than the output voltage. The coupling capacitor must be sized to withstand the full rated input voltage. The coupling capacitor must be able to handle an RMS current as defined by: I
RMS
I
IN
2
CH
D I
2
(1 D) A
RMS
(13)
Where IIN is the average input current and ICH is the average battery charge current. The capacitor value determines the ripple voltage across the coupling capacitor. Neglecting the effects of ESR, the capacitor ripple voltage is defined by: C
I D (1 D) CH IN F fs 0.5 V fs 0.5 V PP PP I
PRODUCT PREVIEW
where VP-P is the desired peak to peak ripple voltage.
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