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Harmonic Reduction Method for a Single-Phase. DC–AC Converter Without an Output Filter. Konstantinos G. Georgakas, Pan

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 9, SEPTEMBER 2014

Harmonic Reduction Method for a Single-Phase DC–AC Converter Without an Output Filter Konstantinos G. Georgakas, Panagis N. Vovos, Member, IEEE, and Nicholas A. Vovos, Senior Member, IEEE

Abstract—This study suggests a sine-wave modulation technique to achieve low total harmonic distortion (THD) of a buck–boost converter connected to a changing polarity inverter. First, we present the main characteristics of the converter’s topology. Then, we describe how the suggested modulation improves the harmonic content of the output in comparison to the previously used technique, whether harmonics are caused by the inductive nature of the source (e.g., domestic wind turbine) or they are created from external sources at the point the converter is connected (e.g., grid). A prototype was built and the efficiency of the method to tackle harmonics was experimentally verified. Experimental results demonstrate the ability of the method to drastically reduce THD, in comparison with the previous modulation method, so that the output complies with the 5% limit without the use of filters. Index Terms—DC–DC power converters, power conversion harmonics, pulse-width modulation converters, total harmonics distortion (THD).

I. INTRODUCTION HE rapid development of renewable generation boosted the need for efficient, cheap, and robust converters that would interface them to the grid, without compromising the quality of supply for the end user. Most renewables provide a dc source of electric power, thus proper interfacing to the grid requires at least an inverter. Often, due to the low voltage acquired from sources such as domestic wind turbines, solar arrays or fuel cells, a boost converter or/and a transformer (if isolation is required) is added at the dc or ac side, respectively, in order to boost the voltage to the appropriate level. The most common type of commercial inverter used for this kind of applications is a variation of sinusoidal pulse width modulation full-bridge inverter. The simplicity of the design provides robust operation and simple control, but the harmonic content of the output requires a low-pass filter to comply with the standards. Two disadvantages of this application are the increased size and cost due to the filter and the losses of the semiconducting switches performing the inverting operation at the inverter bridge (four) and the boost converter (one), usually, at a nona-

T

Manuscript received April 9, 2013; revised July 31, 2013 and October 8, 2013; accepted October 12, 2013. Date of current version April 30, 2014. This work was supported in part by the Special Account of Funds and Research of the University of Patras under Grant D.628. The paper has neither been presented at a conference nor submitted elsewhere previously. Recommended for publication by Associate Editor R. Redl. The authors are with the Department of Electrical and Computer Engineering, University of Patras, Rio, 26504 Greece (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2013.2286918

coustic frequency. Several PWM methods have been developed in order to reduce the harmonic content. Selective harmonic elimination solves the transcendental equations characterizing harmonics, so that appropriate switching angles are computed for the elimination of specific harmonics at the output [1]–[3]. Theoretically, these methods can provide a satisfying harmonic content. However, the solution of these equations is computationally intensive, thus, quite difficult to be done online. In small-scale applications, where powerful digital signal processors (DSPs) are not currently an option due to their higher cost, either switching angles are calculated offline [4]–[8], or the equations are linearized before they are solved [9], [10], or an approximate solution is sought where the topology permits it [11]. Other methods include modification of the carrier signal [12]–[14] or the reference sine wave [15], [16]. All of them, though, are open-loop control schemes, which assume a known and perfectly constant dc source (i.e., harmonics induced to the grid by an inductive source are ignored) and ignore the existing harmonic content of the grid voltage or the distortion caused by the load. In simple terms, they aim to reduce the harmonics created by the PWM itself, rather than improve the harmonic content at the terminal bus, which is affected by the PWM only partially. Authors in [17] and [18] suggested a sine-wave modulated buck–boost converter cascaded with a polarity changing inverter. Simulation results demonstrate that this topology works exceptionally well, producing an ac sine-wave output, which depends upon the reference sine-wave amplitude. It also achieves small total harmonic distortion (THD) at the output voltage, when supplied by an ideal constant dc source, making the use of a filter redundant. Furthermore, switching losses are practically limited to the single semiconducting switch of the buck–boost converter. Additionally, there is no need for a big and expensive stabilizing electrolytic capacitor at the dc bus. Low inertia is required at the common bus of the two converters, so thin-film, low capacity, and long life capacitor is used, instead. However, there are drawbacks for this topology and the previously presented modulation methods, which are not mentioned in [17] or [18]. First, voltage is usually not zero when the inverter swaps output polarity. Low-order odd harmonics are created and THD is compromised. Second, when the dc source is inductive, e.g., a wind turbine generator, the output of the sine-wave modulated buck–boost converter is not an ideal rectified sine anymore. In this case, the waveform peaks are shifted to higher angles than 90◦ ; a distortion which is visualized as a significant third harmonic in the Fourier analysis [see experimental results in Fig. 11(a)].

0885-8993 © 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications standards/publications/rights/index.html for more information.

GEORGAKAS et al.: HARMONIC REDUCTION METHOD FOR A SINGLE-PHASE DC–AC CONVERTER WITHOUT AN OUTPUT FILTER

In this study, we present a simple, but effective, improvement of the sine-wave modulation of the buck–boost converter, so that the output capacitor’s remaining voltage is minimized when the inverter swaps output polarity. Additionally, a low-order harmonic elimination method, superimposed on the buck–boost modulation, is presented. The initial aim of the method was to remedy the output distortion due to the inductive power source, but in practice it improves the harmonic content of the output whether the reason of the distortion is the source, the load, the synchronized grid, or a combination of the aforementioned elements. Similarly, to the methods reviewed in [13], specific harmonics are injected in order to improve the harmonic content of the output. However, these methods share the feature that the injected harmonic amplitudes are precalculated, according to the expected harmonic distortion created by the PWM itself [19], [20]. In our approach, output harmonic content is continuously monitored and mitigated. Computational power is consumed mostly for the measurement of the angle and magnitude of output harmonics (a prerequirement of online harmonic mitigation control), rather than the creation of the cancellation harmonics. A prototype converter was created with a single DSP controlling both the buck–boost converter and the inverter. Experimental results demonstrated the improvements attained for this very promising power converter, without the addition of any new hardware. In Section II, the theoretical background of the topology used will be explained. In the same section, the previously suggested modulation method of the dc converter and the proposed modulation improvements for the reduction of remaining voltage of the dc-link capacitor and elimination of harmonics without the use of an output filter are also presented. In Section III, a prototype that implements the suggested methods and produces a harmonic content that complies with the standards is demonstrated. The last Section, underlines the main conclusions of this study.

Fig. 1.

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Converter topology connected to a dc inductive source.

(a)

(b)

(c)

Fig. 2. (a) Boost converter output voltage (b) inverter’s switching elements pulses, and (c) inverter’s output voltage.

II. THEORY In this Section, the basic principles of the topology of the converter used are presented. Also, we present the previously suggested modulation method of this topology, its drawbacks, and our proposed methods for the reduction of remaining voltage of the dc-link capacitor and elimination of harmonics. A. Hardware The dc–ac conversion circuit utilized in this study is the one suggested in [17]. It is a buck–boost converter coupled with a voltage polarity changing inverter; see Fig. 1. The buck–boost converter continuously produces a rectified sine voltage Vdc,out [see Fig. 2(a)] with double the frequency f of the required output [see Fig. 2(c)]. A full bridge inverter is synchronized with the buck–boost converter [see Fig. 2(b)], so that it swaps its polarity producing a sine-wave output voltage. The full-bridge inverter swaps polarity when the dc voltage is ideally zero. In reality, though, the dc voltage can reach zero only under a specific heavy load or/and low-frequency conditions at the ac side. This is caused by two factors. First, the buck–

boost converter enters noncontinuous conduction mode during time periods that the alternating load current drops below a threshold defined by the inductor size and switching frequency. In discontinuous mode, the output voltage of the dc converter is not given by (1), but it is a function of load, so it cannot be precalculated without an additional current sensor. Fig. 3 shows the ac voltage Vac,out and inductor L current (ichoke ) of our prototype under two different loads. We present it as an example of how Vdc,m in is affected by load when current takes zero instant values (i.e., dc converter enters discontinuous mode). A second factor is the remaining voltage of the dc-link capacitor. In simple terms, the greater the output capacity, the smoother the output voltage. Therefore, minimum dc voltage depends on the capacitor value. However, too low capacitance would lead to the high voltage ripple due to switching at dc output and voltage surges on semiconductor elements, etc. Therefore, generally polarity swapping takes place when dc voltage drops to a minimum (Vdc,m in ) and not zero. In practice, this is achieved by continuously monitoring Vdc,out using a

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 9, SEPTEMBER 2014

Fig. 3.

Inductor current and ac voltage for (a) lower load current value and (b) higher load current value (experimental results).

Fig. 4.

Block diagram of the dc elimination.

voltage transducer and identifying its minimum value per period The above operating principle is depicted in Fig. 2(c). Fig. 5.

B. Modulation 1) Previously Proposed Modulation of the DC Converter: In [17], the duty cycle of the buck–boost converter is continuously calculated under constant PWM frequency, so that the dc output voltage equals the requested rectified sine-wave output voltage D = Vdc,out /(Vdc,out + Vdc,in ).

(1)

In simulations or nearly ideal conditions, a sine voltage can be attained at the output of the inverter, containing mainly highorder harmonics caused by the PWM switching operations of the buck–boost converter. However, in practice, both the remaining dc voltage (Vdc,m in ) at the output and the inductance of the supplying source of the dc converter distort the ideal sine-wave output and create low-order harmonics (see experimental results in Section III). 2) Reducing the Remaining DC Voltage of the Output Capacitor of the DC Converter: Harmonic content is improved, if the remaining dc voltage at the output of the dc converter is reduced. The idea is based on the assumption that the output of the buck–boost converter consists of a constant component Vdc,m in and a rectified sine component [see Fig. 2(a)]. The reduction of Vdc,m in is accomplished via the method defined in the block entitled “Vdc,m in elimination” in Fig. 4 and also in Fig. 5. First, the sampled ac output voltage is rectified and Vdc,m in is measured. Then, a dc component is subtracted [see Fig. 5(a)], so that a type of “dead-band” is created at the modulation waveform (um (t) = sin1 –dc) that is used for the calculation of the duty cycle of the buck–boost converter [see Fig. 5(b)]. Then, the modulation waveform D is calculated [see Figs. 4 and 5(b)] and compared with the carrier triangle waveform [see Fig. 5(c)], so that the length and frequency of the pulses of the buck–boost converter

Creation of the pulses for Vd c , m in elimination.

[see Fig. 5(d)] are defined. In order to compensate for the reduction of the rms level of the output, the modulation signal amplitude could be increased until the target rms is achieved (see Fig. 4 “Vac,rm s error compensation”). The subtracted dc component is a constant signal, having an impact on the output modulation equivalent to the subtraction of a dc value from a rectified sine wave, eliminating Vdc,m in . We preferred a symmetric signal compared to the ac polarity swapping, so that only odd harmonics are affected. According to the next paragraph of this section, odd harmonics can be handled by our harmonic cancellation scheme. However, the reduction of the remaining capacitor voltage with this approach is bounded by an upper limit. When an excess dc component is applied, some odd harmonics increase in magnitude and spectrum width, making the harmonic cancelation method (detailed in the next paragraph) more computationally intensive, since more than one significant harmonic has to be canceled simultaneously (e.g., not only third, but fiftth and seventh, too). The computational effort is not due to the simple calculations needed for the creation of mirror harmonics to be injected, but the measurement of the amplitude and angle of additional output harmonics. Affordable DSPs for single phase, low-power converters (like the one used in our prototype) have limited computing capacity. 3) Suggested Modulation Technique of the DC Converter with Harmonic Injection and DC Step Elimination: In order to tackle the low-order harmonics appearing in the output of the converter, we suggest a cancellation scheme based on the injection of mirror harmonics during the construction of the modulation signal of the dc converter. The harmonic content

GEORGAKAS et al.: HARMONIC REDUCTION METHOD FOR A SINGLE-PHASE DC–AC CONVERTER WITHOUT AN OUTPUT FILTER

Fig. 6.

Suggested harmonic cancellation algorithm.

of the output is calculated with a Fourier analysis. Then, we add low-order harmonics (e.g., third, fifth) to the modulation sine wave at the fundamental frequency equal in magnitude, but with a 180◦ phase difference to the output harmonics to be eliminated. The algorithm implementing the cancellation is presented in Fig. 6. First, the harmonic content of the output is analyzed. Then, we calculate the harmonics in the output excluding the harmonics injected by our converter as it is briefly described below. Let us assume that the converter injects harmonic hB (t) to a grid that already contains harmonic hA (t), so that the output has a total harmonic of hC (t) hA (t) =Asin (2πf t + a) hB (t) =Bsin (2πf t + b)

(2)

hC (t) =Csin (2πf t + c) where A, B, C and a, b, c are the magnitudes and phase angles, respectively, of the harmonics described previously. Since all three harmonics are at the same frequency f (usually, an odd multiplier of the fundamental frequency) we can convert functions (2) to phasors hA (t) → Aej a hB (t) → Bej b

(3)

hC (t) → Ce . jc

The resulting harmonic equals the summation of the injected and existing harmonics Cej c = Aej a + Bej b ⇔ Ccos(c) + iCsin(c) = Acos(a) + iAsin(a)+Bcos(b)+iBsin(b)  Ccos(c) = Acos(a) + Bcos(b) ⇒ Csin(c) = Asin(a) + Bsin(b)   ⎧ ⎨ a= tan−1 Csin (c) − Bsin (b) Ccos (c) − Bcos(b) ⇒ ⎩ A = (Ccos(c) − Bcos(b))/ cos(a).

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lently B = A and b = a–180◦ ), so that the output harmonic is canceled. Knowing what is the magnitude and phase of each harmonic in the output, without harmonic injection, allows us to set the magnitude of the mirror harmonic injected in this iteration (equal in magnitude, but with a phase difference of 180◦ ). Then, the next iteration starts and the Fourier analysis of the output is performed again. The part of the block diagram implementing the proposed method of harmonic elimination is depicted in Fig. 7 with the title “high harmonic injection”. Fig. 8 presents an example of how modulation is modified, so that the third harmonic is eliminated. It is assumed that the third harmonic to be eliminated has an amplitude equal to 15% and a phase angle difference of 240◦ from the fundamental harmonic [see Fig. 8(a)]. The modulation waveform is created by adding a sine waveform having a frequency three times higher to the fundamental harmonic, a phase angle of 240◦ –180◦ = 60◦ (in order to be a mirror of the harmonic to be eliminated) and amplitude 15% of the initial reference sine wave [see Fig. 8(b)]. The resulting waveform is rectified [see Fig. 8(c)] and a dc component equal to Vdc,m in is subtracted from it, so that the waveform of the required Vdc,out is synthesized [see Fig. 8(d)]. Duty cycle D is continuously calculated as a function of Vdc,out and Vdc,in according to (1) and compared with a carrier triangle waveform [see Fig 8(e)]; this comparison defines the length and frequency of the pulses of the buck–boost converter [see Fig. 8(f)]. The inverter swaps polarity at the fundamental frequency, but there is a phase difference with the fundamental modulation sine wave due to the impact of the superimposed mirror harmonics on the appearance of the minimum of Vdc,out in time (see angle ϕ in Fig. 8). This shifting of the polarity swapping angle preserves the properties of the rectified harmonics added in the modulation phase at the alternating voltage output. Theoretically, we could inject an unlimited number of mirror harmonics in order to cancel all harmonics present in the output. Such an action would require a computationally intensive Fourier analysis that cannot be performed online by a DSP of reasonable cost. However, code optimization and fast calculation methods could reduce the computational effort needed for the simultaneous cancellation of more harmonics. This is not the aim of this study, but could be the target of future research. Fortunately, the offline Fourier analysis of our experimental setup under different supply and load conditions presented a small number of odd harmonics. Therefore, we can assume that if only the most significant harmonics are canceled (or even single harmonic), the converter could comply with the standards. The experimental results presented in the next section demonstrate that the suggested modulation technique for the injection of mirror harmonics, which eliminate harmonics indigenous to the converter operation or due to source or load type, is both practically feasible and effective.

(4)

During the initial iteration there is no harmonic injection, i.e., B = 0. In this case, according to (2) and (3), A = C and a = c. In following iterations, we set B = −A and b = a (or equiva-

III. EXPERIMENTAL RESULTS An experimental prototype has been constructed in the laboratory (see Fig. 9), in order to validate the theoretical approach. The basic converter elements of Fig. 1 are described in Table I.

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Fig. 7.

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 9, SEPTEMBER 2014

Block diagram of the proposed modulation methods. TABLE I ELEMENTS OF PROTOTYPE CONVERTER

Fig. 8.

Fig. 9.

Creation of modulation pulses for the dc converter.

Experimental prototype setup.

Fig. 10. ac voltage for V so u rc e = 61.8 V and load voltage V a c , o u t, rm s = 74 V in case without third harmonic elimination: (a) modulation with pure sine wave and (b) with V d c , m in elimination. Experimental results.

A dc source supplying three voltage levels (30.9, 61.8, and 90 V) was used. The different voltage levels simulate the operation of renewable energy sources (e.g., wind turbines, solar arrays), which usually supply a varying level of the dc voltage. The load was chosen to be purely resistive, so that the THD improvement is justified only by the proposed method and not by some current smoothing effect of the load. The buck–boost converter operates at a switching frequency of 20 kHz and the inverter changes polarity at 50 Hz. The prototype was also tested under different output target rms voltages. First, we apply the method for the reduction of Vdc,m in of the dc converter. Fig. 10(a) presents the output voltage of the prototype for Vsource = 61.8 V and Vac,out,rm s = 74 V without Vdc,m in elimination (modulation with pure sine wave). Vdc,m in is reduced from 12 to 4 V when the method is applied [see

GEORGAKAS et al.: HARMONIC REDUCTION METHOD FOR A SINGLE-PHASE DC–AC CONVERTER WITHOUT AN OUTPUT FILTER

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(a)

Fig. 11. Experimental results for V so u rc e = 30.9 V, V a c , o u t, rm s = 44 V and modulation with pure sine wave: (a) waveform and (b) FFT analysis.

(b) Fig. 13. (a) THD and (b) H3 for V so u rc e = 30.9 V for three cases—modulation with pure sine wave, with voltage step V d c , m in elimination, with V d c , m in and third harmonic elimination.

Fig. 12. Experimental results for V so u rc e = 30.9 V and V a c , o u t, rm s = 44 V with third harmonic and dc step elimination: (a) waveform and (b) FFT analysis.

Fig. 10(b)]. The impact of the reduction of Vdc,m in on harmonics is discussed later. Fig. 11(a) presents a typical output waveform of the prototype (Vsource = 30.9 V and Vac,out,rm s = 44 V) without harmonic elimination or reduction of the remaining dc voltage Vdc,m in at the buck–boost converter. The harmonic analysis of this curve is shown in Fig. 11(b), where shifting of voltage peaks beyond 90 ◦ per semiperiod significantly raises third harmonic, which is the main contributor to a THD equal to 13.3%. Fig. 12(a) presents the output waveform of the prototype, this time as a result of the improved modulation method presented in Section II-B. Both Vdc,m in and third harmonic are reduced leading to a THD below 5% [see Fig. 12(b)]. The controller does not completely eliminates them, because further reduction leads to an increase of other harmonics (mainly fifth and seventh) and worse THD [see Fig. 12(b)]. Experimental results demonstrated that the suggested modulation method succeeds to keep THD under 5% limit, even when the modulation index increases in order to create higher voltages at the converter’s output. Specifically, Fig. 13(a) presents

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 9, SEPTEMBER 2014

(a)

(a)

(b) Fig. 15. Experimental results for V so u rc e = 90 V and load voltage V a c , o u t, rm s = 104 V with third harmonic and dc step elimination: (a) waveform and (b) THD and third harmonic distortion as a percentage of fundamental amplitude.

(b) Fig. 14. (a) THD and (b) H3 for V so u rc e = 61.8 V for three cases—modulation with pure sine wave, with voltage step V d c , m in elimination, with V d c , m in and third harmonic elimination.

the THD when Vsource = 30.9 V, Vac,out,rm s varies from 22 to 52 V and the buck–boost converter follows three modulation methods: 1) modulation with pure sine wave; 2) dc step elimination; and 3) both dc step elimination and third harmonic elimination. It is evident that dc step elimination has some effect on the reduction of THD for all output voltages, but third harmonic elimination is needed in order to reduce it under the 5% limit. A graphical representation how the two suggested modulation improvements affect only the third harmonic can be seen in Fig. 13(b). In this figure, H3 is the percent contribution of the third harmonic to THD, measured for various values of Vac,out,rm s . The elimination of the dc step has a constant positive impact on the third harmonic. When the third harmonic elimination method is applied the respective harmonic becomes practically zero. This suggests that the effective elimination of the third harmonic, in practice, is sufficient to reduce total harmonics within specifications. Similar results were recorded for a higher Vsource = 61.8 V [see Fig. 14(a) and (b)], which means that the source voltage is not affecting the efficiency of the

suggested method to suppress the harmonic content so that it complies with the standards. Fig. 15(a) shows the output voltage waveform of the converter equal to the rms value of 104 V, when Vsource = 90 V and the suggested modulation method is applied. The THD is 4.6%, though, the third harmonic contributes less than 0.3% to that. Fig. 15(b) shows THD and H3 , when Vsource = 90 V and Vac,out,rm s took values between 54 and 104 V. The THD is clearly below the limit set by the standards (5%) and the contribution of the third harmonic is kept below 1%; an evidence that the suggested harmonic elimination method works efficiently. Both dc step elimination and third harmonic elimination were needed in order to take this set of measurements, because only then source current was kept below the maximum current that our dc supply can provide (5.5 A). This fact suggests that the proposed approach utilizes the dc source better, which is also a result of the improved harmonic content. In order to generalize the application of our method, we have altered our experimental setup, so that both third and fifth harmonics appear on the load voltage. A 1:7 transformer connects the converter to a 990-Ω load. The higher resistive load was used in conjunction with the higher transformer output voltage, so that the total supply power remains at the same level as in the previous experiments and below the 5.5 A limit. The voltage transducer was transferred to the load side. An excessive dc step

GEORGAKAS et al.: HARMONIC REDUCTION METHOD FOR A SINGLE-PHASE DC–AC CONVERTER WITHOUT AN OUTPUT FILTER

Fig. 16. Experimental results for the setup including step-up transformer V so u rc e = 30.9 V and load voltage V a c , o u t, rm s = 227 V with excessive dc step elimination: (a) waveform and (b) THD and third and fifth harmonic distortion as a percentage of fundamental amplitude.

elimination on the higher output voltage (see Section II-B2), together with the inductive circuit element added by the transformer itself, resulted in a substantially higher fifth harmonic (5.9%). The following figure presents the output voltage waveform [see Fig. 16(a)] and the harmonic analysis [see Fig. 16(b)] of the new experimental setup for Vsource = 30.9 V, Vac,out,rm s = 227 V without any harmonic elimination. Fig. 17 presents the improved output voltage waveform [see Fig. 17(a)] and harmonic analysis [see Fig. 17(b)] when third and fifth harmonic elimination is performed simultaneously. The THD was reduced from 14.7% [see Fig. 16(b)] to less than 5% [see Fig. 17(b)], while both third and fifth harmonics have been nearly eliminated. The aforementioned results demonstrate that more than one significant harmonic can be canceled simultaneously. An attempt to eliminate more than two harmonics was prohibited by the limited computational power of our DSP, due to the calculations required by a Fourier analysis of more harmonics. Code optimization or utilization of more powerful DSPs could pos-

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Fig. 17. Experimental results for the setup including step-up transformer V so u rc e = 30.9 V and load voltage V a c , o u t, rm s = 227 V with simultaneous third and fifth harmonic elimination: (a) waveform and (b) THD and third and fifth harmonic distortion as a percentage of fundamental amplitude.

sibly overcome this issue, which is not, though, the aim of this research. IV. CONCLUSION We have presented a modulation method for the reduction of harmonics at the connection point of a dc–ac converter. The converter is a buck–boost dc converter in series with a changing polarity inverter. Specific harmonics can be canceled, if this is required by the application. A prototype was built and the experimental results demonstrate the improvement of THD, through the cancellation of low-order harmonics, so that the output voltage complies with the limit imposed by the standards, without the use of a filter. The method makes no distinction whether harmonics are created from the converter itself or they are supplied by other sources to the connection point. Therefore, further research could lead to the creation of a grid-connected dc–ac converter with harmonic cancellation capabilities, without changing the hardware.

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 9, SEPTEMBER 2014

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Konstantinos G. Georgakas was born in Athens Greece, on December 2, 1972. He received the degree in electrical engineering from the Technological University of Sofia, Sofia, Bulgaria, in 1997, and the Ph.D. degree from the University of Patras, Patras, Greece, in 2009. He has been a Tutor of power electronics and electric machines in the Departments of Electrical Engineering and Mechanical Engineering, Technological Educational Institute of Patras since 2005. His main research interests include power electronics and machines, and he is specifically interested in high frequency switching firing of power electronic semiconductor elements.

Panagis N. Vovos was born in Athens, Greece, on October 23, 1978. He is a Graduate of the Department of Electrical Engineering, University of Patras, Patras, Greece, in 2002. In 2005, he received the Ph.D. degree from Edinburgh University, Edinburgh, U.K. In February 2009, he completed the Postdoctoral Research from the Department of Electrical Engineering, University of Patras. Since 2007, he has been an Adjunct Lecturer with the Department of Electrical Engineering, University and the Technological Educational Institute of Patras. He is also an Engineering Consultant for power system operators and private investors. His research interests include enhanced optimal power flow, efficient generation capacity allocation, consideration of costs of equipment wear, and smart-grid plug-n-play power converters.

Nicholas A. Vovos (M’76–SM’95) was born in Thessaloniki, Greece, in 1951. He received the Diploma and Ph.D. degrees from the University of Patras, Patras, Greece, and the M.Sc. degree from the University of Manchester Institute of Science and Technology (UMIST), Manchester, U.K., in 1974, 1978, and 1975, respectively. He is a Professor in the Department of Electrical and Computer Engineering, University of Patras. His research interests include the transient stability study of integrated ac/dc systems, FACTS, power quality, renewable energy sources, and microgrids.

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