THERMAL RESISTANCE [PDF]

THERMAL RESISTANCE This manual explains about measurement procedures and definitions of thermal resistance.

■INTRODUCTION Generally, the life of a device would decrease to half, and the failure rate would double whenever Junction Temperature, Tj, goes up by 10℃. Moreover, when Tj exceeds 175℃, a device has the possibility of breaking. Therefore, it is necessary to keep Tj in the proper temperature range, which is the lower the better, and a heat design should be done under the condition of the range of 80-100℃. In fact, it is difficult for IC packages that handle high power to keep Tj in this range. Therefore, it is common to make Tj the 80% of a maximum permissible temperature. A value of a thermal resistance is dependent on a chip, a layout of a leadframe, a board, and so forth. It means even if sizes of the IC packages are the same and layouts of leadframes are different, thermal resistances are not the same.

■DEFINITIONS The thermal resistance of a IC package is calculated by the difference between Tj and the ambient Temperature, Ta, under the condition that the IC package dissipates electric power of 1W. Here are three expressions of the thermal resistance, and each term of expressions are defined in Table1 and Fig.1. Ta Tc1

θca θja

Tj

Tj  Ta θja  Pd

jt  θjc 

Tj  TC1 Pd Tj  TC 2 Pd

ψjt θjc Tc2

θca Ta

Fig.1 Thermal resistances of a IC package

Table1 Definitions

Item θja ψjt θjc θca Ｔj Ｔa ＴC1 ＴC2 Ｐd

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Definitions thermal resistance between Tj and Ta thermal resistance between Tj and TC1 thermal resistance between Tj and TC2 thermal resistance between Tc and Ta junction temperature ambient temperature temperature of the top surface of IC package temperature of the bottom surface of IC package maximum permissible power

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THERMAL RESISTANCE ■Estimation of Tj when ψjt is known Tj can be estimated by following order 1. Power, P, is calculated by operating current and voltage. 2. Tc1 is measured by using a thermometer like a radiation thermometer and thermocouples. 3. Tj is calculated by Tc1, and ψjt which is shown in Table 3.

Tj  jt  P  TC1 Note) θja and ψjt in Table 3 are measured values based on JEDEC with no wind. Each value is dependent on a chip, a layout of a leadframe, a board, and so forth.

■Measurement of Thermal Resistance The measurement of thermal resistance is based on JEDEC.

[Test board] The outline of the measurement board is shown in Fig.2, which is based on JEDEC. A=76.2mm

B=114.3mm

1.57mm

1mm

Cu foil

[Surface ]

1 mm

[Back surface]

2-layer board [Surface ]

G=1.98mm

E=2.39mm D=3.96mm F=74.2mm

C=9.53mm

1.6mm

H=2.54mm

A

Cu foil 1 Cu foil 2

A [Back surface]

0.25mm≦A≦0.55mm

4-layer board

Fig.2 Measurement board

Note) Board material Board dimension Cu foil dimension

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: FR-4 :(2-layer board) 114.3×76.2mm,Thickness 1.57mm :(4-layer board with Cu foil 1,2) 114.3×76.2mm,Thickness 1.6mm :74.2x74.2mm (Thickness 35um) are applied to 4-layer board, as Cu foil 1, 2.

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THERMAL RESISTANCE [Chip for measurement of Thermal Resistance] A chip is composed of elements of a resistance and a diode. The resistance is used for heating, and the diode is for a sensor of temperature. We have three kinds of size, because thermal resistance is dependent on a chip size.

＋

Chip image

Circuit Fig.3 Image of the chip

[Measurement of K factor] Tj cannot be measured directly. However, by a character of a forward voltage, VF, of a diode is dependent on temperature. Therefore, Tj is known during a measurement by measuring VF. However, dependency of diode which called K-factor, K, should be measured first.

K

Tj VF

Tj  THi  TLo

[℃/mV]

K factor

VF  VHi  VLo

VF [V]

where VHi : voltage at THi VLo : voltage at TLo

0

50

100

150

[JEDEC chamber] Ambient temperature [℃] JEDEC chamber with no wind condition (still air) is adopted. The ambient temperature is measured with thermocouples at the position that is located 25.4mm below the center of the IC package. 304.8mm

IC package

139.7mm

25.4mm

304.8mm

152.4mm

200

thermocouples

Fig.4 JEDEC chamber

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THERMAL RESISTANCE [Measurement circuit] IM

IH

VH

IM

VF

GND

Fig.5 Measurement circuit [Measurement procedure] 1. VF0 is measured by giving the diode with a current (1mA), IM, at the ambient temperature. 2. A Voltage, VH, is given to the resistance in the chip until temperature at upper surface of the IC package, which is measured with a radiation thermometer, is saturated. After confirming the saturation, IH is read. 3. VFSS is measured by giving the diode with a current, IM.

VH IM VF

VFSS

VF0

Fig.6 Timing of measurement Note) VH is measured at three points, the voltage of Tstg-max, Vstg-max, and lower and higher than Vstg-max. [Calculation] θja andψjt are calculated from the following Table 2. Table 2 Thermal resistance calculation Thermal resistance calculation

[θja]

θja 

Tj K  VF  VH  IH VH  IH

[℃／Ｗ] , where

[ψjt]

jt 

VF  VF 0  VFSS

Tj  Ta   TC1  K  VF  Ta   TC1 VH  IH

VH  IH

, where

[℃／Ｗ]

VF  VF 0  VFSS

where VH ：voltage given to the resistance in the chip IH ：current when temperature at the upper surface of the IC package is saturated

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THERMAL RESISTANCE

The maximum permissible power, Pd [mW]

[The Permissible Regions of Dissipated Power] Pd is the maximum permissible power at Ta=25℃. Pd is dependent on the ambient temperture, which is shown in Fig.7.

125 or 150℃

25℃

Topr

Tj(max)

Ambient temperature. Ta[℃]

Fig.7 The maximum permissible power

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THERMAL RESISTANCE ■Thermal Resistance of each package There are typical measured value based on JEDEC with no wind. Each value is dependent on a chip, a layout of a leadframe, a board, and so forth. Table 3 Thermal resistance of each package

PKG DMP8 DMP14 DMP16 DMP20 SOP8 JEDEC(EMP8) SOP16 JEDEC(EMP16-E2) SOP8 SOP14 SOP22 SOP28 SOP40-K1 SSOP8 SSOP8-A3 SSOP10 SSOP14 SSOP16 SSOP20 SSOP20-B2 SSOP20-C3 SSOP32 SSOP44 TSSOP54-N1 2) HSOP8 HTSSOP24-P1 MSOP8(TVSP8) MSOP10(TVSP10) MSOP8(VSP8) MSOP10(VSP10) SC-82AB SC-88A SOT-23-5 SOT-23-6 1)2) SOT-89-3 QFP32-J2 QFP44-A1 QFP48-P1 LQFP48-R3 LQFP52-H2 QFP56-A1 QFP64-H1 LQFP64-H2 QFP100-U1 1)2) TO-252-3 PLCC28

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θja (℃/W) 235 195 195 150 180 110 165 125 120 155 135 270 215 270 225 210 185 200 130 110 110 105 160 115 215 215 210 210 365 355 260 245 200 115 95 65 75 85 105 70 65 55 105 55

2 layer board Tj:125℃ Ψjt Pd (mW) (℃/W) 47 425 47 510 47 510 37 665 34 555 21 905 26 605 21 800 18 830 37 645 37 740 42 370 36 465 42 370 38 440 35 475 34 540 34 500 13 765 20 905 20 905 10 950 28 625 14 865 27 465 27 465 33 475 33 475 89 270 89 280 70 380 70 405 67 500 17 865 17 1050 17 1535 9 1330 11 1175 17 950 17 1425 6 1535 5 1815 17 950 10 1815

Tj:150℃ Pd (mW) 530 640 640 830 690 1135 755 1000 1040 805 925 460 580 460 555 595 675 625 960 1135 1135 1190 780 1085 580 580 595 595 340 350 480 510 625 1085 1315 1920 1665 1470 1190 1785 1920 2270 1190 2270

θja (℃/W) 175 150 150 120 125 70 110 80 85 125 105 210 155 210 180 160 140 150 85 70 70 75 50 45 160 160 155 155 255 260 195 175 130 90 75 50 45 65 80 50 50 45 40 35

4 layer board Tj:125℃ Ψjt Pd (mW) (℃/W) 40 570 40 665 40 665 33 830 29 800 18 1425 23 905 17 1250 14 1175 33 800 33 950 36 475 15 645 36 475 33 555 26 625 26 710 26 665 9 1175 14 1425 14 1425 9 1330 12 2000 7 2220 23 625 23 625 25 645 25 645 72 390 73 380 60 510 60 570 65 765 15 1110 15 1330 15 2000 5 2220 11 1535 15 1250 15 2000 5 2000 5 2220 12 2500 7 2855

Tj:150℃ Pd (mW) 710 830 830 1040 1000 1785 1135 1560 1470 1000 1190 595 805 595 690 780 890 830 1470 1785 1785 1665 2500 2775 780 780 805 805 490 480 640 710 960 1385 1665 2500 2775 1920 1560 2500 2500 2775 3125 3570

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THERMAL RESISTANCE PKG 2)

EPFFP6-A2 EPFFP10-C42) PCSP12-C3 PCSP20-CC PCSP20-E3 PCSP24-ED PCSP32-F7 PCSP32-G32) 2) PCSP32-GD EPCSP32-L22) DFN6-J1 (SON6-J1) DFN4-F1(ESON4-F1)2) 2) DFN6-H1(ESON6-H1) DFN8-U1(ESON8-U1)2) 2) DFN8-V1(ESON8-V1) DFN8-W2(ESON8-W2)2) QFN24-T1/T2 EQFN12-E22) 2) EQFN12-E4 EQFN14-D72) 2) EQFN16-G2 2) EQFN12-JE 2) EQFN16-JE EQFN18-E72) 2) EQFN26-HH 2) EQFN24-LK

θja (℃/W) 370 295 240 225 225 205 225 205 205 210 345 300 280 280 215 195 150 285 285 295 255 215 180 220 160 145

2 layer board Tj:125℃ Ψjt Pd (mW) (℃/W) 59 270 64 335 40 415 40 440 40 440 40 485 24 440 24 485 24 485 29 475 88 285 52 330 42 355 43 355 16 465 21 510 22 665 52 350 52 350 53 335 43 390 22 465 21 555 33 450 15 625 13 685

Tj:150℃ Pd (mW) 335 420 520 555 555 605 555 605 605 595 360 415 445 440 580 640 830 435 435 420 490 580 690 565 780 860

θja (℃/W) 220 160 140 140 130 115 115 115 115 95 260 110 110 110 70 60 75 105 105 95 100 80 70 90 60 65

4 layer board Tj:125℃ Ψjt Pd (mW) (℃/W) 53 450 55 625 33 710 33 710 33 765 26 865 17 865 17 865 17 865 16 1050 69 380 27 905 26 905 26 905 8 1425 8 1665 15 1330 27 950 27 950 26 1050 26 1000 10 1250 11 1425 22 1110 7 1665 8 1535

Tj:150℃ Pd (mW) 565 780 890 890 960 1085 1085 1085 1085 1315 480 1135 1135 1135 1785 2080 1665 1190 1190 1315 1250 1560 1785 1385 2080 1920

Notes： 2 1) Thermal resistance values (θja,ψjt) are measured with the 2-layer board having 100mm copper foil, which is based on JEDEC. 2) Thermal resistance values (θja,ψjt) are measured with the 4-layer board having thermal via holes, which is also based on JEDEC.

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THERMAL RESISTANCE ■Thermal Resistance depending on area of Cu foil There are typical values by mounting on five kinds of boards, “PAT.1” through “PAT.5”, shown in Table 4 and Table 5. Those are 2-layer boards based on JEDEC. However, they do not have any thermal via holes.

TO252

200

Thermal resistance (℃/W)

Thermal resistance (℃/W)

180 160 140 θja

120

PAT.1

100

PAT.2

80

PAT.3 PAT.4

60

PAT.5

Ψjt

40

PAT.1

20

PAT.2 PAT.3

SOT89

350

PAT.5

PAT.4

0

300 θja

250

PAT.1

200

PAT.2 PAT.3

150

PAT.5

Ψjt

100

PAT.1

PAT.2 PAT.3

PAT.4

PAT.5

50 0

0

400

800

1200

1600

0

400

2

PAT.1

250

PAT.3

PAT.4

200 150 100

Thermal resistance (℃/W)

350 θja

PAT.2

250

1600 2

Cu foil area (mm )

2000

PAT.4

150 100

0

1200

PAT.3

200

0 800

PAT.1 PAT.2

50

400

θja

300

50 0

1600

SC88A, SC82AB

400

350 300

1200

Cu foil area (mm )

SOT23-5(MTP5)、SOT23-6(MTP6)

400

800

2

Cu foil area (mm )

Thermal resistance (℃/W)

PAT.4

0

400

800

1200

1600

2000

2

Cu foil area (mm )

Fig.8 Thermal Resistance depending on area of Cu foil

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Table 4 Image of Cu foil Package

TO252

Cu foil PAT.1

SOT89

SOT23-5(MTP5) SOT23-6(MTP6)

Foot pattern Area of Cu foil PAT.2

PAT.3

PAT.4

PAT. 5

－

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THERMAL RESISTANCE

Package Cu foil PAT.1

Table 5 Image of Cu foil SC88A SC82AB

PAT.2

PAT.3

PAT.4

Table 6 Area of Cu foil Package Cu foil PAT.1 PAT.2 PAT.3 PAT.4 PAT.5

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TO252

SOT89

600 mm2 1225 mm2

SOT23-5(MTP5) SOT23-6(MTP6) 100 mm2 225 mm2 400 mm2

SC88A SC82AB

1600 mm2 -

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